Chip industry standard UCIe will promote open ecological construction

Published:2022-03-08 Author:Mass Power

On March 3, chip manufacturers Intel, TSMC, Samsung and ten industry giants, including ASE, AMD, ARM, Qualcomm, Google, Microsoft, Meta(Facebook), announced the establishment of Chiplet Alliance and the launch of a new universal chip interconnection standard, Ucle.In this way, we can jointly build standards for small chip interconnection and promote open ecological construction.

The new alliance aims to establish a single-chip packaging standard called Universal Chiplet Interconnect Express(UCIe) to create a new ecosystem and promote collaboration in packaging and stacking.In short, they will discuss better ways to combine different types of chips (or so-called small chips) in one package to create more powerful chip systems.

"UCIe aims to provide a complete 'die-to-die' interconnection standard that makes it easy for end users to mix and match small chip components.This means they will be able to build custom systems on a chip (SoC) using components from different vendors.Individual chips are referred to as bare chips prior to encapsulation, "the report added.

That reflects the growing importance of the field, given that the chip giants seem to want to collaborate on standards for chip packaging.Given the limited number of transistors that can fit on a chip, companies are now trying to optimize the performance of their products by packaging and stacking chips in various combinations.

The integration of multiple small chips in one package to provide products across market segments is the future of the semiconductor industry and the backbone of Intel's IDM 2.0 strategy," Intel said in a statement.Critical to this future is an open ecosystem of small chips where key industry partners will work together under the UCIe alliance to achieve the common goal of transforming the way the industry delivers new products and continuing to deliver on the promise of Moore's Law."

In this regard, foreign experts explain that THE SoC chip has reached a bottleneck stage, and the increasing precision of the chip means that the technology transition is becoming more and more difficult.Although the major manufacturers are speeding up, the 3nm chip, which was originally scheduled to hit the market by the end of 2021, is still far from being released, and Moore's Law has failed.In addition, according to Semiengingeering, a semiconductor technology research institute, the chip development cost of the 7nm node is about 297 million DOLLARS, while the chip development cost of the 5nm node has reached 542 million dollars, up 82%. If the future 3nm SoC technology is still adhered to,Research and development costs are likely to exceed $1bn, so technological change is inevitable.